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74LS109 Dual J-K Positive-Edge-Triggered Flip-Flops DIP - Essential Logic Elements for Digital Circuits

74LS109 Dual J-K Positive-Edge-Triggered Flip-Flops DIP - Essential Logic Elements for Digital Circuits
  • Stock: 8
  • Model: TPS-00672 (HSN CODE 8542)
  • Weight: 5.00g
150 samples sold
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₹15.00
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74LS109 – Dual J-K Positive-edge-triggered Flip-Flops DIP

Features

  • Two Independent JK Positive Edge Triggered Flip-Flops
  • Separate Preset and Clear Inputs
  • Fast Switching Times
  • Operating Temperature up to 70oC
  • Standard TTL Switching Voltages
  • VCC Supply Voltage  4.75 - 5 V
  • VIH HIGH-Level Input Voltage 2 V
  • VIL LOW-Level Input Voltage 0.8 V
  • IOH HIGH-Level Output Current −0.4mA
  • IOL LOW-Level Output Current 16mA
  • Package type 16 Pin DIP

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Download the Manual and software here